Semiconductor memory device and method for erasing

专利名称：Semiconductor memory device and method

for erasing the same

发明人：Koji Hosono申请号：US11987716申请日：20071204公开号：US07630251B2公开日：20091208

专利附图：

摘要：A semiconductor memory device includes NAND cell units each having memorycells connected in series, select gate transistors disposed for coupling both ends of theNAND cell unit and dummy cells disposed between the select gate transistors and the

memory cells neighbored to them. The dummy cells are set in a threshold voltagedistribution higher than the erased threshold voltage of the memory cell by combinationof a first program mode and a second program mode, the first program mode being forboosting the threshold voltage of the dummy cells with a program voltage applied whilethe second program mode is for boosting the threshold voltage of the dummy cellsafter reaching a certain threshold level under the condition that the threshold voltageincrease is suppressed in comparison with the first program mode.

申请人：Koji Hosono

地址：Fujisawa JP

国籍：JP

代理机构：Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.

更多信息请下载全文后查看