专利名称：Synchronous signal processing system发明人：Higashino, Kiminori, NEC IC Microcomp.
Systems Ltd
申请号：EP00109909.2申请日：20000510公开号：EP1052563A3公开日：20080319
专利附图：
摘要：A signal processing system includes a PLL circuit (13) for generating a first clocksignal based on a system clock signal, a CPU (12) for generating a second clock signalbased on the first clock signal and operating with the second clock signal. The PLL circuit
(13) receives the second clock signal as a feed-back signal to deliver the first clock signalso that the phases of the second clock signal and the system clock signal coincide witheach other. A data path circuit (11) operates with the system clock signal and a UDLcircuit (14) operates with the second clock signal, whereby the system can be handled asa synchronous circuit operating with the single system clock signal.
申请人：NEC Electronics Corporation
地址：1753 Shimonumabe Nakahara-ku Kawasaki, Kanagawa 211-8668 JP
国籍：JP
代理机构：Betten & Resch
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